ducky.cpu.registers module¶
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class
ducky.cpu.registers.
Registers
[source]¶ Bases:
enum.IntEnum
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CNT
= 33¶
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FP
= 30¶
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IP
= 32¶
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R00
= 0¶
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R01
= 1¶
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R02
= 2¶
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R03
= 3¶
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R04
= 4¶
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R05
= 5¶
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R06
= 6¶
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R07
= 7¶
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R08
= 8¶
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R09
= 9¶
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R10
= 10¶
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R11
= 11¶
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R12
= 12¶
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R13
= 13¶
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R14
= 14¶
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R15
= 15¶
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R16
= 16¶
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R17
= 17¶
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R18
= 18¶
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R19
= 19¶
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R20
= 20¶
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R21
= 21¶
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R22
= 22¶
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R23
= 23¶
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R24
= 24¶
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R25
= 25¶
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R26
= 26¶
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R27
= 27¶
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R28
= 28¶
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R29
= 29¶
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REGISTER_COUNT
= 34¶
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REGISTER_SPECIAL
= 30¶
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SP
= 31¶
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_member_map_
= OrderedDict([('R00', <Registers.R00: 0>), ('R01', <Registers.R01: 1>), ('R02', <Registers.R02: 2>), ('R03', <Registers.R03: 3>), ('R04', <Registers.R04: 4>), ('R05', <Registers.R05: 5>), ('R06', <Registers.R06: 6>), ('R07', <Registers.R07: 7>), ('R08', <Registers.R08: 8>), ('R09', <Registers.R09: 9>), ('R10', <Registers.R10: 10>), ('R11', <Registers.R11: 11>), ('R12', <Registers.R12: 12>), ('R13', <Registers.R13: 13>), ('R14', <Registers.R14: 14>), ('R15', <Registers.R15: 15>), ('R16', <Registers.R16: 16>), ('R17', <Registers.R17: 17>), ('R18', <Registers.R18: 18>), ('R19', <Registers.R19: 19>), ('R20', <Registers.R20: 20>), ('R21', <Registers.R21: 21>), ('R22', <Registers.R22: 22>), ('R23', <Registers.R23: 23>), ('R24', <Registers.R24: 24>), ('R25', <Registers.R25: 25>), ('R26', <Registers.R26: 26>), ('R27', <Registers.R27: 27>), ('R28', <Registers.R28: 28>), ('R29', <Registers.R29: 29>), ('FP', <Registers.FP: 30>), ('REGISTER_SPECIAL', <Registers.FP: 30>), ('SP', <Registers.SP: 31>), ('IP', <Registers.IP: 32>), ('CNT', <Registers.CNT: 33>), ('REGISTER_COUNT', <Registers.REGISTER_COUNT: 34>)])¶
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_member_names_
= ['R00', 'R01', 'R02', 'R03', 'R04', 'R05', 'R06', 'R07', 'R08', 'R09', 'R10', 'R11', 'R12', 'R13', 'R14', 'R15', 'R16', 'R17', 'R18', 'R19', 'R20', 'R21', 'R22', 'R23', 'R24', 'R25', 'R26', 'R27', 'R28', 'R29', 'FP', 'SP', 'IP', 'CNT', 'REGISTER_COUNT']¶
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_member_type_
¶ alias of
int
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_value2member_map_
= {0: <Registers.R00: 0>, 1: <Registers.R01: 1>, 2: <Registers.R02: 2>, 3: <Registers.R03: 3>, 4: <Registers.R04: 4>, 5: <Registers.R05: 5>, 6: <Registers.R06: 6>, 7: <Registers.R07: 7>, 8: <Registers.R08: 8>, 9: <Registers.R09: 9>, 10: <Registers.R10: 10>, 11: <Registers.R11: 11>, 12: <Registers.R12: 12>, 13: <Registers.R13: 13>, 14: <Registers.R14: 14>, 15: <Registers.R15: 15>, 16: <Registers.R16: 16>, 17: <Registers.R17: 17>, 18: <Registers.R18: 18>, 19: <Registers.R19: 19>, 20: <Registers.R20: 20>, 21: <Registers.R21: 21>, 22: <Registers.R22: 22>, 23: <Registers.R23: 23>, 24: <Registers.R24: 24>, 25: <Registers.R25: 25>, 26: <Registers.R26: 26>, 27: <Registers.R27: 27>, 28: <Registers.R28: 28>, 29: <Registers.R29: 29>, 30: <Registers.FP: 30>, 31: <Registers.SP: 31>, 32: <Registers.IP: 32>, 33: <Registers.CNT: 33>, 34: <Registers.REGISTER_COUNT: 34>}¶
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