ducky.cpu package¶
Subpackages¶
Module contents¶
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class
ducky.cpu.
CPU
(machine, cpuid, memory_controller, cores=1)[source]¶ Bases:
ducky.interfaces.ISnapshotable
,ducky.interfaces.IMachineWorker
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class
ducky.cpu.
CPUCore
(coreid, cpu, memory_controller)[source]¶ Bases:
ducky.interfaces.ISnapshotable
,ducky.interfaces.IMachineWorker
This class represents the main workhorse, one of CPU cores. Reads instructions, executes them, has registers, caches, handles interrupts, ...
Parameters: - coreid (int) – id of this core. Usually, it’s its serial number but it has no special meaning.
- cpu (ducky.cpu.CPU) – CPU that owns this core.
- memory_controller (ducky.mm.MemoryController) – use this controller to access main memory.
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check_protected_ins
()[source]¶ Raise
AccessViolationError
if core is not running in privileged mode.This method should be used by instruction handlers that require privileged mode, e.g. protected instructions.
Raises: AccessViolationError – if the core is not in privileged mode
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create_frame
()[source]¶ Create new call stack frame. Push
IP
andFP
registers and setFP
value toSP
.
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destroy_frame
()[source]¶ Destroy current call frame. Pop
FP
andIP
from stack, by poppingFP
restores previous frame.Raises: CPUException – if current frame does not match last created frame.
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do_int
(index)[source]¶ Handle software interrupt. Real software interrupts cause CPU state to be saved and new stack and register values are prepared by
__enter_interrupt
method, virtual interrupts are simply triggered without any prior changes of CPU state.Parameters: index (int) – interrupt number
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exit_interrupt
()[source]¶ Restore CPU state after running a interrupt routine. Call frame is destroyed, registers are restored, stack is returned back to memory pool.
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flags
¶
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raw_pop
()[source]¶ Pop value from stack. 4 byte number is read from address in
SP
, thenSP
is incremented by four.Returns: popped value Return type: u32
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raw_push
(val)[source]¶ Push value on stack.
SP
is decremented by four, and value is written at this new address.Parameters: val (u32) – value to be pushed
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reset
(new_ip=0)[source]¶ Reset core’s state. All registers are set to zero, all flags are set to zero, except
HWINT
flag which is set to one, andIP
is set to requested value.Parameters: new_ip (u32_t) – new IP
value, defaults to zero
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class
ducky.cpu.
CPUCoreState
[source]¶ Bases:
ducky.snapshot.SnapshotNode
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exception
ducky.cpu.
CPUException
(msg, core=None, ip=None)[source]¶ Bases:
exceptions.Exception
Base class for CPU-related exceptions.
Parameters: - msg (string) – message describing exceptional state.
- core (ducky.cpu.CPUCore) – CPU core that raised exception, if any.
- ip (u32_t) – address of an instruction that caused exception, if any.
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class
ducky.cpu.
CPUState
(*fields)[source]¶ Bases:
ducky.snapshot.SnapshotNode
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class
ducky.cpu.
CoreFlags
[source]¶ Bases:
ducky.util.Flags
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ducky.cpu.
DEFAULT_CORE_INST_CACHE_SIZE
= 256¶ Default size of core instruction cache, in instructions.
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ducky.cpu.
DEFAULT_IVT_ADDRESS
= 0¶ Default IVT address
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ducky.cpu.
DEFAULT_PT_ADDRESS
= 65536¶ Default PT address
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class
ducky.cpu.
InstructionCache
(mmu, size, *args, **kwargs)[source]¶ Bases:
ducky.util.LRUCache
Simple instruction cache class, based on LRU dictionary, with a limited size.
Parameters: - core (ducky.cpu.CPUCore) – CPU core that owns this cache.
- size (int) – maximal number of entries this cache can store.
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class
ducky.cpu.
InterruptVector
(ip=0, sp=0)[source]¶ Bases:
object
Interrupt vector table entry.
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SIZE
= 8¶
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exception
ducky.cpu.
InvalidInstructionSetError
(inst_set, *args, **kwargs)[source]¶ Bases:
ducky.cpu.CPUException
Raised when switch to unknown or invalid instruction set is requested.
Parameters: inst_set (int) – instruction set id.
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exception
ducky.cpu.
InvalidOpcodeError
(opcode, *args, **kwargs)[source]¶ Bases:
ducky.cpu.CPUException
Raised when unknown or invalid opcode is found in instruction.
Parameters: opcode (int) – wrong opcode.
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class
ducky.cpu.
MMU
(core, memory_controller)[source]¶ Bases:
ducky.interfaces.ISnapshotable
Memory management unit (aka MMU) provides a single point handling all core’s memory operations. All memory reads and writes must go through this unit, which is then responsible for all translations, access control, and caching.
Parameters: - core (ducky.cpu.CPUCore) – parent core.
- memory_controller (ducky.mm.MemoryController) – memory controller that provides access to the main memory.
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check_access
(access, addr, align=None)[source]¶ Check attempted access against PTE. Be aware that each check can be turned off by configuration file.
Parameters: - access –
read
,write
orexecute
. - addr (u24) – memory address.
- align (int) – if set, operation is expected to be aligned to this boundary.
Raises: ducky.errors.AccessViolationError – when access is denied.
- access –
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ducky.cpu.
cmd_set_core
(console, cmd)[source]¶ Set core address of default core used by control commands: sc <coreid>
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ducky.cpu.
do_log_cpu_core_state
(core, logger=None, disassemble=True, inst_set=None)[source]¶ Log state of a CPU core. Content of its registers, and other interesting or useful internal variables are logged.
Parameters: - core (ducky.cpu.CPUCore) – core whose state should be logged.
- logger – called for each line of output to actualy log it. By default,
core’s
ducky.cpu.CPUCore.DEBUG()
method is used.
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ducky.cpu.
log_cpu_core_state
(*args, **kwargs)[source]¶ This is a wrapper for ducky.cpu.do_log_cpu_core_state function. Its main purpose is to be removed when debug mode is not set, therefore all debug calls of ducky.cpu.do_log_cpu_core_state will disappear from code, making such code effectively “quiet”.